Prof. YE Jichun’s team at the Ningbo Institute of Materials Technology and Engineering (NIMTE) of the Chinese Academy of Sciences (CAS), collaborating with researchers at the University of Nottingham Ningbo China, has revealed the underlying dynamics of Silicon oxide (SiO_x) tunneling junctions, including pinhole formation processes and charge-carrier transport mechanisms. The study was published in Cell Reports Physical Science. 

As one of the most promising alternatives to reduce the cost and improve the efficiency of devices, tunnel oxide passivating contact (TOPCon) technology has attracted considerable attention in the photovoltaic (PV) community. However, the physical mechanism of the core structures of TOPCon, i.e., polycrystalline silicon (poly-Si)/ SiO_x/ crystalline silicon (c-Si) junctions, has not been clarified, restricting the further improvement of device efficiency. 

To address this problem, researchers at NIMTE conducted extensive experiments and simulations, unraveling the underlying charge carrier dynamics of the SiO_x tunneling junctions. 

By virtue of refined experiments, the pinhole formation process was revealed, suggesting that interface stress induced by the mismatch of thermal expansion coefficients during at high temperatures may account for the fracture of SiO_x films.  

In addition, the simulation results provided direct evidence for charge carrier transport theory, demonstrating that tunneling charge-carrier transport functions in tandem with direct transport through pinholes. Which mechanism plays the dominant role depends on the density and size of pinholes as well as the SiO_x thickness. 

Furthermore, a fundamental physical model with local pinholes was developed with the simultaneous consideration of the passivation and contact behaviors. A detailed current-recombination analysis in conjunction with predictions of device efficiency showed that the potential device efficiency can reach 27%. 

The findings of this study concerning the pinhole formation and charge carrier transport mechanisms, not only shed new light on the underlying device physics of poly-Si/SiO_x/c-Si junctions, but also offer valuable guidance to unlock the full potential for high-efficiency TOPCon device design, which is crucial to both academia and industry. 

Schematic diagram of the pinhole formation and charge-carrier transport (Image by NIMTE)